Non-Referenced Prefetch(NRP) Cache for Instruction Prefetching

A new conceptual cache, NRP (Non-Referenced Prefetch) cache, is proposed to improve the performance of instruction prefetch mechanisms which try to prefetch both the sequential and non-sequential blocks under the limited memory bandwidth. The NRP cache is used in storing prefetched blocks which were not referenced by the CPU, while these blocks were discarded in other previous prefetch mechanisms. By storing the non-referenced prefetch blocks in the NRP cache, both cache misses and memory traacs are reduced. A prefetch method to prefetch both the sequential and the non-sequential instruction paths is designed to utilize the eeectiveness of the NRP cache. The results from trace-driven simulation show that this approach provides an improvement in memory access time than other prefetch methods. Particularly, the NRP cache is more eeective in a lookahead prefetch mechanism that can hide longer memory latency. Also, the NRP cache reduces 50% 112% of the additional memory traacs required to prefetch both instruction paths. This approach can achieve both the improved memory access time and the reduced memory traac as a cost-eeective cache design.